As recent rapid trend in modern electronic devices is not only toward lighter and smaller devices, but also toward multi-function and high-performance devices, the integrated-circuit (IC) fabrication and technology has to evolve correspondingly toward a more high-density and miniature design so as to allow more electronic components to be received inside limited chip space. Consequently, the relating IC package substrate and the package technology are evolved accordingly to meet the trend.
To design a high-density circuitry layout in a package substrate, a fine-pitch process such as semi-additive process (SAP) is used to reduce the package lead pitch. However, line width and line pitch of the circuit wires formed by SAP have almost the same size from 15 μm to 20 μm. The SAP circuit wires may have their thickness limit of 20 μm at most. A thick circuit wire may have a large cross-sectional area and thus a small resistivity, to be applied to high power electronic products. However, it is comparatively difficult to thicken circuit wires in a fine-pitch circuitry design.
Therefore, it is in need of a new and advanced packaging solution.